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  <body><table style="margin: 0 auto;"><tr><td><div class="topbar"><a href="AArch32-regindex.html">AArch32 Registers</a></div></td><td><div class="topbar"><a href="AArch64-regindex.html">AArch64 Registers</a></div></td><td><div class="topbar"><a href="AArch32-sysindex.html">AArch32 Instructions</a></div></td><td><div class="topbar"><a href="AArch64-sysindex.html">AArch64 Instructions</a></div></td><td><div class="topbar"><a href="enc_index.html">Index by Encoding</a></div></td><td><div class="topbar"><a href="ext_alpha_index.html">External Registers</a></div></td><td><div class="topbar"><a href="ext_enc_index.html">External Registers by Offset</a></div></td><td><div class="topbar"><a href="func_index.html">Registers by Functional Group</a></div></td><td><div class="topbar"><a href="notice.html">Proprietary Notice</a></div></td></tr></table><hr/><h1 class="register-section">ERRGSR, Error Group Status Register</h1><p>The ERRGSR characteristics are:</p><h2>Purpose</h2>
        <p>Shows the status for the records in the group.</p>
      <h2>Configuration</h2>
        <p>ERRGSR is implemented only as part of a memory-mapped group of error records.</p>

      
        <p>This manual describes a group of error records accessed via a standard 4KB memory-mapped peripheral. For a 4KB peripheral, up to 24 error records can be accessed if the Common Fault Injection Model is implemented, and up to 56 otherwise.</p>
      <h2>Attributes</h2>
        <p>ERRGSR is a 64-bit register.</p>
      <h2>Field descriptions</h2><table class="regdiagram"><thead><tr><td>63</td><td>62</td><td>61</td><td>60</td><td>59</td><td>58</td><td>57</td><td>56</td><td>55</td><td>54</td><td>53</td><td>52</td><td>51</td><td>50</td><td>49</td><td>48</td><td>47</td><td>46</td><td>45</td><td>44</td><td>43</td><td>42</td><td>41</td><td>40</td><td>39</td><td>38</td><td>37</td><td>36</td><td>35</td><td>34</td><td>33</td><td>32</td></tr></thead><tfoot><tr><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td><td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td><td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td></tr></tfoot><tbody><tr class="firstrow"><td class="lr" colspan="8"><a href="#fieldset_0-63_56">RES0</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S55</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S54</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S53</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S52</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S51</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S50</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S49</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S48</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S47</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S46</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S45</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S44</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S43</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S42</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S41</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S40</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S39</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S38</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S37</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S36</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S35</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S34</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S33</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S32</a></td></tr><tr class="firstrow"><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S31</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S30</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S29</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S28</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S27</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S26</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S25</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S24</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S23</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S22</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S21</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S20</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S19</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S18</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S17</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S16</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S15</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S14</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S13</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S12</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S11</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S10</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S9</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S8</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S7</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S6</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S5</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S4</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S3</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S2</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S1</a></td><td class="lr" colspan="1"><a href="#fieldset_0-55_0-1">S0</a></td></tr></tbody></table><h4 id="fieldset_0-63_56">Bits [63:56]</h4><div class="field">
      <p>Reserved, <span class="arm-defined-word">RES0</span>.</p>
    </div><h4 id="fieldset_0-55_0-1">S&lt;m&gt;, bit [m], for m = 55 to 0<span class="condition"><br/>When error record &lt;m&gt; is implemented and error record &lt;m&gt; supports this type of reporting:
                        </span></h4><div class="field">
      <p>The status for error record &lt;m&gt;. A read-only copy of <a href="ext-errnstatus.html">ERR&lt;m&gt;STATUS</a>.V.</p>
    <table class="valuetable"><tr><th>S&lt;m&gt;</th><th>Meaning</th></tr><tr><td class="bitfield">0b0</td><td>
          <p>No error.</p>
        </td></tr><tr><td class="bitfield">0b1</td><td>
          <p>One or more errors.</p>
        </td></tr></table>
      <p>If the Common Fault Injection Model is implemented then up-to 24 records can be implemented meaning bits [55:24] are <span class="arm-defined-word">RES0</span>.</p>
    </div><h4 id="fieldset_0-55_0-2"><span class="condition"><br/>Otherwise:
                        </span></h4><div class="field">
      <p>Reserved, <span class="arm-defined-word">RES0</span>.</p>
    </div><h2>Accessing ERRGSR</h2><h4>ERRGSR can be accessed through the memory-mapped interfaces:</h4><table class="info"><tr><th>Component</th><th>Offset</th><th>Instance</th></tr><tr><td>RAS</td><td><span class="hexnumber">0xE00</span></td><td>ERRGSR</td></tr></table><p>Accesses on this interface are <span class="access_level">RO</span>.</p><hr class="bottom_line"/><table style="margin: 0 auto;"><tr><td><div class="topbar"><a href="AArch32-regindex.html">AArch32 Registers</a></div></td><td><div class="topbar"><a href="AArch64-regindex.html">AArch64 Registers</a></div></td><td><div class="topbar"><a href="AArch32-sysindex.html">AArch32 Instructions</a></div></td><td><div class="topbar"><a href="AArch64-sysindex.html">AArch64 Instructions</a></div></td><td><div class="topbar"><a href="enc_index.html">Index by Encoding</a></div></td><td><div class="topbar"><a href="ext_alpha_index.html">External Registers</a></div></td><td><div class="topbar"><a href="ext_enc_index.html">External Registers by Offset</a></div></td><td><div class="topbar"><a href="func_index.html">Registers by Functional Group</a></div></td><td><div class="topbar"><a href="notice.html">Proprietary Notice</a></div></td></tr></table><p class="versions">30/03/2023 19:07; 997dd0cf3258cacf72aa7cf7a885f19a4758c3af</p><p class="copyconf">Copyright © 2010-2023 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.</p></body>
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